About me

Open to New Opportunities: I am currently on the job market seeking roles in Computer Architecture, HPC, and Hardware Security, in industrial and academic research labs. My research experience includes work on confidential computing architectures for HPC, heterogeneous memory systems, simulation and modeling, analysis of instruction set architectures, and simulator validation.

This is an exciting time to be a computer architect. Traditional performance gains owing to scaling of transistor size are diminishing, applications are increasingly getting diverse and researchers have been continuously exposing micro-architectural and architectural security vulnerabilities. All of this makes me passionate about research in Computer Architecture. Generally, the idea of doing research to increase computing efficiency inspires me as it can unlock numerous longstanding scientific mysteries. I also like to work at the intersection of Computer Architecture and areas like Information Security and Machine Learning.

At UC Davis I am part of the UC Davis Architecture Research (DArchR) group and advised by Prof. Jason Lowe-Power. I am also an affiliate at Lawrence Berkeley National Lab.

One of the main research problems that I am pursuing right now is enabling secure HPC systems through a hardware/software co-design. I am also involved in building support infrastructure for reproducible and structured research with gem5 (famous architecture simulator).

In my past life, I have worked on building and analyzing detection techniques for cache side channel attacks, analyzing the performance differences among different instruction set architectures (ISAs), and investigating computer architecture simulators.

More details of my research projects is here.