I have pursued different research interests which broadly fall under the umbrella of computer architecture. This page shares those experiences. Please, feel free to shoot me an email ( if you would like to talk about any of these.

Architectures for Secure High-Performance Computing

High performance computing (HPC) is moving away from traditional simulation and modeling to large scale computational problems involving large datasets. Sometimes this data can be sensitive, provided by third parties to HPC centers or individual researchers, and raises security concerns. This project aims to provide secure architectures focused on HPC centers keeping the performance loss to minimum.

Simulation and Modeling

Computer architects mostly use simulation and modeling techniques to evaluate their research ideas. In the past, I have done comprehensive survey and comparative study of different architectural simulation tools. We also performed some work on showing how to perform more accurate gem5 simulations for x86 targets by exposing some issues with out of order cpu model and showing how to calibrate target configurations to achieve better accuracy.

Currently, I mostly focus on gem5. Recently, I have been contributing to the RISCV support in gem5 and building new DRAM cache models using gem5. I am also involved in a project to build gem5art, a tool for reproducible and structured experiments with gem5 and build gem5-resources to help researchers set-up their gem5 experiments in a short time.

Performance and Power Analysis of Instruction Set Architectures

Contemporary instruction set architectures (ISAs) and their implementations demand a revisit of the famous debate of the role of ISAs in determining the performance and energy consumption of any processor. According to different computer architects, the compiler and microarchitectural innovations have made ISAs ineffective. On contrary, many researchers believe that there is still an important role played by ISAs to determine the performance and energy efficiency of processors. This project studies differences among various ISAs and evaluates applications’ performance and energy efficiency compiled for different ISAs on diverse microarchitectures. Another goal of this project is to use machine learning techniques to correlate observed differences across ISAs to particular microarchitectural/non-microarchitectural events and ISA factors.

Microarchitectural Side Channel Attacks

Machine Learning for Computer Architecture

Other Works

Instruction Prefetching

As the pipeline depth increases to extract out more parallelism aggressively, the need for a continuous supply of fetched instructions increases as well. Relying on repeating behavior of instruction stream and pre-fetching instructions before their actual use, is one of the many used techniques to improve memory performance associated to instructions as it helps to reduce the number of Instruction cache misses and can also overlap miss latencies. Different ideas have been proposed to implement these prefetchers. This project involved studying different instruction prefetching techniques (Next line prefetchers, Return Address Stack Based Prefetching, Proactive instruction prefetch) by implementing them in gem5 simulator and comparing them with a newly proposed technique based on benchmark working set signatures. This project uses different workloads from BigData Bench suite.

Related (Preliminary) Work

Phase Based Instruction Prefetcher, Ayaz Akram, ECE5950 Project Report, Fall 2015, WMU.

System Mode Emulation in QEMU for OCTEON MIPS64

System emulation is a better alternative to native testing of applications on embedded hardware in terms of cost, time and management. In this project, we have extended Quick Emulator (QEMU v1.0.1) to support Cavium Octeon MIPS64 processor-based embedded systems. The performance of guest Octeon MIPS64 system is also compared against native using synthetic and applications benchmarks. My specific responsibilities in this project were to provide emulation support for devices like Interrupt Controller, Timers, Console and Ethernet Controller(e1000). I also performed experiments to evaluate and improve the performance of emulated system compared to native hardware system.

Related Work

Emulating an Octeon MIPS64 based Embedded System on X86 in QEMU, Muhammad Amir Mehmood, Qurrat ul Ain, Ayaz Akram, Abdul Qadeer and Abdul Waheed, In IEEE 19th International Multi-topic Conference (INMIC), December, 2016.

Enabling Green Video Streaming over the Internet of Things

I worked on the embedded systems side of this project i.e. setting up wireless sensor nodes using stm32f4 discovery boards and Contiki OS. I worked on porting Contiki OS to the required platform and also worked on adding wifi support in Contiki for the stm32f4 discovery board based platform.

Android-based ECG monitoring System

This project involves the development of a low power and portable ECG monitoring device based on MSP430 microcontroller and an Android Phone. The motivation behind this project was to provide a reliable solution to cardiovascular patients to help them do an independent ECG analysis. Such solutions are cheap and easy to use in academic settings. The ECG monitoring system based on MSP430 microcontroller was fully integrated with sensing electrodes on the transmitter side. The controller converted the analog signal to a digital signal via an inbuilt analog-to-digital converter, conditioned and filtered it for transmission via a Bluetooth transceiver IC compatible with the MSP430. The real-time data was received by the smartphone and displayed in real-time.

Related Work

Android Based ECG Monitoring System, Ayaz Akram, Raheel Javed and Awais Ahmad, In International Journal of Science and Research (IJSR), November 2013.

Comparative Study of Edge Detection Techniques

Edge detection in a particular image is one of the basic steps of many image processing algorithms. It is therefore important to check the fidelity of edge detection techniques. This project provided a comparison of different edge detection schemes that fall into three main categories of edge detectors: Gradient-based edge detectors, Laplacian-based edge detectors, and Non-derivative based edge detectors. A quantitative (using Pratts figure of merit) and qualitative (using real-life images) comparison of different edge detection techniques was performed.

Related Work

Comparison of Edge Detectors, Ayaz Akram and Asad Ismail, In International Journal of Computer Science and Information Technology Research, October 2013. (Journal of Computer Science and Information Technology Research, October 2013.